As scaling limits of complementary metal oxide semiconductor (CMOS) technology are neared, variability has been found to play an increasingly important role in integrated circuit performance. A change in performance of an integrated circuit over time may be caused by various stress mechanisms, such as, for example, hot electron effects in both negative channel field effect transistors (nFETs) and positive channel field effect transistors (pFETs), and negative bias temperature instability (NBTI) in pFETs. Over the lifetime of an integrated circuit, the performance of an integrated circuit may degrade by 5% or more due to such effects. In practice this anticipated future degradation may be provided for in a performance guard band specified with the integrated circuit performance prior to shipping to a customer.
The degradation of the characteristics of an individual FET in response to both hot electron effects and NBTI are frequently defined in terms of an increase in threshold voltage, Vt. Actual degradation due to various stress mechanisms has been increasing with CMOS scaling and is known to vary considerably based on the techniques utilized in the integrated circuit fabrication process. Developing an understanding of the dependence of such degradation on processing techniques for each new technology is an important and difficult task, and may involve accelerated stress testing and comprehensive evaluation of large populations of devices, such as, for example, individual FETs. More specifically, the Vt shift of each member of the population in response to the stress may be evaluated. Simulations may then be carried out to predict the impact on various circuit types.
Hot electron effects are strongest under conditions of low temperature and high source-drain voltage. When a ring oscillator device having inverter stages is stressed at room temperature and at high power supply voltage (Vdd), hot electron effects dominate the degradation response. Such an arrangement has been used as the basis of an inline test for diagnosing hot electron effects. The ring oscillator approach has the advantage of directly providing the circuit response to stress as opposed to the direct current (dc) FET response from which circuit response is inferred.
Thus, it would be highly desirable to provide inline testable structures that provide an indication of the stress induced performance degradation of an integrated circuit device after only a short stress period. It is also desirable for a collective response to stress to be directly measured without requiring measurement of each circuit individually. Additionally, because stressing at room temperature makes it difficult to differentiate NBTI from hot electron effects, and because elevated temperatures are impractical inline, to date there have been no effective inline tests that measure NBTI and distinguish it from hot electron effects.